Micro and Nano Electronics Lab
Discipline OF ECE, PDPM Indian Institute of Information Technology Design and Manufacturing Jabalpur


2013
S. No. Paper Title
1
Naugarhiya, Alok, and P. N. Kondekar. "Electrical characteristics comparison between process and device structures of super junction vdmos." In 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE), pp. 1-4. IEEE, 2013.
2
Sahu, Chitrakant, Jawar Singh, and P. N. Kondekar. "Electrical characteristics and short channel performance comparison of different gate junctionless transistors." In 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE), pp. 1-5. IEEE, 2013.
3
Singh, Sangeeta, Pravin Kondekar, and Ankit Dixit. "Digital and analog performance of gate inside p-type junctionless transistor (GI-JLT)." In 2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation, pp. 394-397. IEEE, 2013.
4
Kumar, Pankaj, P. N. Kondekar, Sangeeta Singh, and Ishu Agrawal. "Characteristics and Sensitivity Analysis of Gate Inside Junctionless Transistor (GI-JLT)." In 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), pp. 56-59. IEEE, 2013.
5
Sharma, Dheeraj, and Santosh Kumar Vishvakarma. "Precise analytical model for short channel cylindrical gate (CylG) gate-all-around (GAA) MOSFET." Solid-State Electronics 86 (2013): 68-74.
6
Sharma, Dheeraj, and Santosh Kumar Vishvakarma. "Precise analytical model for short-channel quadruple-gate gate-all-around MOSFET." IEEE Transactions on Nanotechnology 12, no. 3 (2013): 378-385.
7
Sharma, Dheeraj, and Santosh Vishvakarma. "Analysis of crossover point and threshold voltage for triple gate MOSFET." In 2013 Spanish Conference on Electron Devices, pp. 99-102. IEEE, 2013.